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DFK1N60
N-Channel MOSFET
Features
High ruggedness RDS(on) (Max 11.5 )@VGS=10V 1. Gate 3. Source Gate Charge (Typical 7nC) Improved dv/dt Capability 100% Avalanche Tested
N-Channel MOSFET
2. Drain
BVDSS = 600V RDS(ON) = 11.5 ohm ID = 0.8A
General Description
This N-channel enhancement mode field-effect power transistor using DI semiconductor's advanced planar stripe, DMOS technology intended for off-line switch mode power supply. Also, especially designed to minimize rds(on) and high rugged avalanche characteristics. The SOT-223 pkg is well suited for charger SMPS and small power inverter application.
SOT-223
2
1
2
3
Absolute Maximum Ratings
Symbol
VDSS ID IDM VGS EAS EAR dv/dt PD TSTG, TJ TL Drain to Source Voltage Continuous Drain Current(@TC = 25C) Continuous Drain Current(@TC = 100C) Drain Current Pulsed Gate to Source Voltage Single Pulsed Avalanche Energy Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation(@TC = 25 C) Derating Factor above 25 C Operating Junction Temperature & Storage Temperature Maximum Lead Temperature for soldering purpose, 1/8 from Case for 5 seconds.
(Note 2) (Note 1) (Note 3) (Note 1)
Parameter
Value
600 0.8 0.63 3.2
Units
V A A A V mJ mJ V/ns W W/C C C
30
48 0.3 4.5 3 0.024 - 55 ~ 150 300
Thermal Characteristics
Symbol
RJC RJA
Parameter
Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient
Value Min.
-
Typ.
-
Max.
12 42
Units
C/W C/W
Note: RJA is the sum of the junction to case and case to ambient resistance where the case thermal resistance is defined as the solder mounting suface of the drain pins . RJC is guaranteed by design while RJA is determined by the user's board design. ( 42C/W when mounted on a 1 in2 pad of 2 oz copper ) Jan, 2005. Rev. 0. Copyright@ D&I Semiconductor Co., Ltd., Korea. All rights reserved.
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DFK1N60
Electrical Characteristics
Symbol Off Characteristics
BVDSS BVDSS/ TJ IDSS Drain-Source Breakdown Voltage Breakdown Voltage Temperature coefficient Drain-Source Leakage Current Gate-Source Leakage, Forward Gate-source Leakage, Reverse VGS = 0V, ID = 250uA ID = 250uA, referenced to 25 C VDS = 600V, VGS = 0V VDS = 480V, TC = 125 C VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VDS = VGS, ID = 250uA VGS =10 V, ID = 0.5A 600 106 10 100 100 -100 V mV/C uA uA nA nA ( TC = 25 C unless otherwise noted )
Parameter
Test Conditions
Min
Typ
Max
Units
IGSS
On Characteristics
VGS(th) RDS(ON) Gate Threshold Voltage Static Drain-Source On-state Resistance 2.0 8.5 4.0 11.5 V
Dynamic Characteristics
Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Input Capacitance Output Capacitance Reverse Transfer Capacitance VGS =0 V, VDS =25V, f = 1MHz 174 185 80 340 370 160 pF
Dynamic Characteristics
Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge(Miller Charge) VDS =480V, VGS =10V, ID =0.8A see fig. 12.
(Note 4, 5)
VDD =300V, ID =0.8A, RG =25 see fig. 13.
(Note 4, 5)
15 75 30 35 7.5 1 3
35 140 60 60 9 nC ns
-
Source-Drain Diode Ratings and Characteristics
Symbol
IS ISM VSD trr Qrr
Parameter
Continuous Source Current Pulsed Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
Test Conditions
Integral Reverse p-n Junction Diode in the MOSFET IS =0.8A, VGS =0V IS=0.8A, VGS=0V, dIF/dt=100A/us
Min.
-
Typ.
420 0.42
Max.
1.0 4.0 1.4 -
Unit.
A V ns uC
NOTES 1. Repeativity rating : pulse width limited by junction temperature 2. L = 137mH, IAS =0.8A, VDD = 50V, RG = 50 , Starting TJ = 25C 0.8A, di/dt 300A/us, VDD BVDSS, Starting TJ = 25C 3. ISD 4. Pulse Test : Pulse Width 300us, Duty Cycle 2% 5. Essentially independent of operating temperature.
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DFK1N60
Fig 1. On-State Characteristics
VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top :
Fig 2. Transfer Characteristics
10
0
ID, Drain Current [A]
ID, Drain Current [A]
10
0
10
-1
150 C 25 C -55 C
Notes : 1. VDS = 50V 2. 250 s Pulse Test
o o
o
10
-2
Notes : 1. 250 s Pulse Test 2. TC = 25
-1 0 1
10
10
10
10
-1
2
4
6
8
10
VDS, Drain-Source Voltage [V]
VGS, Gate-Source Voltage [V]
Fig 3. On Resistance Variation vs. Drain Current and Gate Voltage
30
Fig 4. On State Current vs. Allowable Case Temperature
RDS(ON), Drain-Source On-Resistance [ ]
IDR, Reverse Drain Current [A]
25
20
10
0
15
VGS = 10V
150
25
10
VGS = 20V
5
Note : TJ = 25
Notes : 1. VGS = 0V 2. 250 s Pulse Test
0 0.0
0.5
1.0
1.5
2.0
2.5
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Fig 5. Capacitance Characteristics ( Non-Repetitive )
750
Fig 6. Gate Charge Characteristics
12
VGS, Gate-Source Voltage [V]
Ciss=Cgs+Cgd(Cds=shorted) Coss=Cds+Cgd Crss=Cgd
VDS = 120V
10
VDS = 300V VDS = 480V
Capacitance [pF]
500
Notes : 1. VGS = 0V 2. f=1MHz
8
6
Ciss
250
4
2
0
Coss Crss
0 5 10 15 20 25 30 35 40
Note : ID = 2.4 A
0
0
4
8
12
16
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
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DFK1N60
Fig 7. Breakdown Voltage Variation vs. Junction Temperature
1.2
3.0
Fig 8. On-Resistance Variation vs. Junction Temperature
BVDSS, (Normalized) Drain-Source Breakdown Voltage
RDS(on), (Normalized) Drain-Source On-Resistance
2.5
1.1
2.0
1.0
1.5
1.0
Notes : 1. VGS = 10 V 2. ID = 0.8 A
0.9
Notes : 1. VGS = 0 V 2. ID = 250 A
0.5
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Fig 9. Maximum Safe Operating Area
Fig 10. Maximum Drain Current vs. Case Temperature
0.8
10
1
Operation in This Area is Limited by R DS(on)
ID, Drain Current [A]
1 ms 10 ms
ID' Drain Current [A]
10
0
100 s
0.6
10
-1
DC
0.4
10
-2
0.2
Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
0
o o
10
-3
10
10
1
10
2
10
3
0.0 25
50
75
100
o
125
150
VDS, Drain-Source Voltage [V]
TC' Case Temperature [ C]
Fig 11. Transient Thermal Response Curve
10
2
Z JC(t), Thermal Response
10
1
D = 0 .5
0 .2
10
0
0 .1 0 .0 5 0 .0 2 0 .0 1 s in g le p u ls e
N o te s : 1 . Z JC = 4 2 (t) /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T JM - T C = P D M * Z JC (t)
10
-1
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]
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DFK1N60
Fig. 12. Gate Charge Test Circuit & Waveforms
5K 0 1V 2 20F 0n 30F 0n
Sm Tp a e ye a DT sU VS D
VS G 1V 0 Q g s Q g
VS G
Q g d
DT U
1A m
Cag hr e
Fig 13. Switching Time Test Circuit & Waveforms
V D S
R L V D D
( . rt dD 0 a V) 5e S
V D S
9 0 %
1 0 V R G Pe u l s G rtr ea no e
D U T
V i n
1 0 %
t(n d) o
t r tn o
t(f) df o tf o f
t f
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
V D S ID R G
L V D D
BDS V S 1 -- LA2 ---------E =-- LI S ---------A S 2 BDS -V V-D S D BDS V S IS A I () Dt
1V 0
DT U
V D D
tp
V () Dt S Te i m
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DFK1N60
Fig. 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+ VDS _
IS
L
Driver RG
Same Type as DUT
VDD
VGS
* dv/dt controlled by RG * IS controlled by pulse period
VGS ( Driver )
Gate Pulse Width D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS ( DUT ) IRM
di/dt
Body Diode Reverse Current
VDS ( DUT )
Body Diode Recovery dv/dt
Vf
VDD
Body Diode Forward Voltage Drop
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DFK1N60
SOT-223 Package Dimension
A L
M N J
O K L P
B D E
C D G I H F Q
D IM E N S IO N M in mm Typ. M ax D IM E N S IO N M in mm Typ. M ax
A 2 .9 0 3 .0 0 3 .1 0 J 1 .5 5 1 .7 5 1 .9 5
B
C 0 .6 0
D
E 4 .3 5
F 6 .3 0 6 .5 0 6 .7 0 O 0 .0 4 0 .0 6 0 .1 0
G
H
I 1 .4 0
2 .3 0
0 .7 0 0 .8 0
0 .9 5
4 .6 0 4 .8 5
0 .8 9
0 .4 6
1 .6 0 1 .8 0
K 3 .3 0 3 .5 0 3 .7 0
L
M
N 0 .4 5
P 6 .7 0 7 .0 0 7 .3 0
Q 0 .2 0 0 .2 5 0 .3 5
0 .6 0 1 .8 0
0 .6 5 0 .8 5
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